BayLibre contributions to Linux v7.0

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Linux v7.0 was released on April 12, 2026. BayLibre contributed 127 authored commits across multiple subsystems.

Driver Core: Bus Method Migration

Uwe Kleine-König continued a cross-subsystem effort to migrate bus drivers away from the generic struct device_driver callbacks to bus-specific equivalents. For FSI, the migration included centralizing bus assignment in fsi_driver_register() and making fsi_bus_type private. For TEE, registration helpers including module_tee_client_driver() were added to reduce boilerplate. For SCSI, scsi_{,un}register_driver() was changed to take a struct scsi_driver directly. For PCI/portdrv, the migration also fixed a potential resource leak. Beyond these, the same pattern was applied to TEE client drivers, SDIO, serdev, SoundWire, ALSA seq, greybus, host1x, MHI, fsl-mc, and gpio stub, with all in-tree drivers in each subsystem converted.

In the au1100fb framebuffer driver, Uwe replaced the license boilerplate with an SPDX header, folded au1100fb.h into its only user, replaced custom printk wrappers with pr_* macros, made the driver compilable on non-MIPS platforms, and moved device-specific data out of global variables.

As PWM maintainer, Uwe emitted native waveform configuration in /sys/kernel/debug/pwm for drivers that support the waveform API. He committed external contributions including Rust PWM abstractions, Devicetree binding fixes, and PWM driver improvements.

IIO

ADXL380

Francesco Lavra optimized FIFO reads in the ADXL380 interrupt handler to use a single regmap_noinc_read() call, enabling 16 kHz sampling on all three axes over a 1 MHz I2C bus. He fixed a FIFO overread by rounding down the entry count to a multiple of the number of enabled scan elements, since the sensor writes one channel sample at a time regardless of how many channels are active. He also added 1 kHz sampling frequency support via the SAR signal path in VLP mode.

ST_LSM6DSX

Francesco fixed st_lsm6dsx_set_fifo_odr() to apply only to the internal accelerometer and gyroscope sensors, preventing incorrect register writes for external sensors accessed via the sensor hub. He removed the buffer sampling frequency sysfs attribute from non-accelerometer sensors to prevent out-of-bounds access to the two-entry odr_table array. He refactored the event management infrastructure to support multiple event types per axis and used it to add tap event detection for the LSM6DSV chip family.

David Lechner fixed big-endian scan buffer issues in vcnl4035 and ti-adc161s626, and added a DMA-safe buffer for spi_read() in the latter. He added an IIO_DECLARE_QUATERNION() macro to enforce 16-byte alignment for quaternion buffer fields and used it to fix hid-sensor-rotation. That same driver also needed a timestamp hack to write timestamps to both the old and new offset, since both locations potentially accumulated years of userspace dependence.

SPI: Multi-Lane Support

David Lechner added multi-lane SPI support to the kernel. He added ctlr->num_data_lanes to indicate multiple physical serializers and a multi_lane_mode field to struct spi_transfer for peripherals that require coordinated access across lanes. The Devicetree bindings were extended: spi-{rx,tx}-bus-width changed from scalar uint32 to arrays where the array length indicates the number of data lanes, and new spi-{tx,rx}-lane-map properties were added for mapping peripheral lanes to controller lanes when lanes are skipped. The AXI SPI Engine driver gained support for SPI_MULTI_LANE_MODE_STRIPE, enabling simultaneous reads from multiple ADC channels with separate SDO lines on the v2.0.0 IP core. Corresponding dt-bindings for the ADI AXI SPI engine and a documentation page for multi-lane support were added.

ARM64: Amlogic Devicetree

Jerome Brunet fixed critical MMC clock issues on Amlogic SoCs, where incorrect settings broke low-speed initialization.

As Amlogic clock maintainer, Jerome Brunet committed clock support for the T7 SoC family (PLL, peripheral, and SCMI clock controllers), video encoder and demodulator clocks for S4, and HDMI PLL output divider constraints for GXL/GXM and G12A/G12B/SM1 SoCs.

ARM: OMAP

As ARM OMAP maintainer, Kevin Hilman committed Devicetree fixes, reference count and error handling corrections, and removal of unused symbols and drivers for the OMAP platform. He also acked the removal of the legacy OMAP cpufreq driver.

DRM

David Lechner fixed bad pixel data in the ST7586 display driver caused by incorrect dbi->write_memory_bpw configuration, which produced a three-column byte swap visible as display corruption.

Francesco Lavra fixed the page start calculation in the Solomon SSD130x display controller for dirty rectangle updates in page addressing mode. The start page value was incorrectly set without taking into account the top-left Y coordinate.

VT

Nicolas Pitre fixed alternate screen support in the virtual terminal: alternate screen switching saved vc_origin but not vc_uni_lines, causing garbled display when returning from the alternate screen. The fix adds vc_saved_uni_lines to mirror the existing save/restore of vc_origin, fixing a regression from commit 23743ba64709.

Summary

Type Count
Authored 127
Signed-off-by 2
Acked-by 4
Reviewed-by 15
Suggested-by 1

BayLibre contributions to Zephyr v4.4.0

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Zephyr v4.4.0 was released on April 14, 2026. BayLibre contributed 256 authored commits spanning cryptography, ARM64 architecture, LoRa/LoRaWAN, and driver support.

Cryptography: Mbed TLS 4.x and TF-PSA-Crypto 1.x

Valerio Setti led the integration of Mbed TLS 4.1 and TF-PSA-Crypto 1.1 into Zephyr. For the time being Mbed TLS 3.6 is retained only for compatibility reasons, because TF-M is still at v2.2 revision, and it will be removed once TF-M will transition to v2.3. The CMake build was completely reshaped to use add_subdirectory() against Mbed TLS and TF-PSA-Crypto’s own CMake files rather than manually selecting sources. Configuration was split into separate Kconfig files, one for each module. Several Kconfig options related to legacy Mbed TLS crypto were removed. Configuration header files have been strongly simplified moving most of the logic at Kconfig level. New Kconfigs for TLS ciphersuites have been added in order to allow the end user to quickly select all the crypto features they need for a TLS connection.

The mbedtls_shim crypto driver was overhauled. Legacy cipher (ECB, CBC), AEAD (CCM, GCM) and hash APIs were replaced with the PSA API.

OpenThread, JWT, HostAP, MCUboot, flash-map, websocket and all samples and tests (1 and 2) were transitioned to use PSA Crypto API instead of legacy Mbed TLS crypto.

Since PSA API does not support (yet) parsing of Elliptic Curve points in compressed format, specific code was added to the uoscore-uedhoc library to overcome this limitation.

A mechanism for automatic enablement of CONFIG_ENTROPY_GENERATOR was added in Random subsystem in order to simplify end user configuration file. A run time deadloop for entropy gathering was also fixed.

ARM64: ARMv9-A Architecture and Security Extensions

Nicolas Pitre added ARMv9-A architecture support with Cortex-A510 as the default processor for generic ARMv9-A targets.

Pointer Authentication (PAC) was added for ARMv8.3+ to protect against ROP attacks, with per-thread key isolation and integration with Zephyr’s thread model. A follow-on fix addressed a crash on SMP secondary CPUs when PAC is enabled. Branch Target Identification (BTI) was added for ARMv8.5+ to protect against JOP attacks. BTI requires the C library to be built with branch protection enabled; Nicolas added the arm*: BTI requires C library built with branch protection check to enforce this. ARM_PAC_PER_THREAD RNG dependency handling was also improved.

SVE context switching was implemented for ARMv9-A, supporting both SVE and SVE2 with lazy context preservation. The implementation is incremental: threads using only FPU instructions get NEON access and preservation; upgrading to SVE instructions upgrades the NEON context to full SVE context from that point on. An ISB was added between SVE trap control and ZCR register writes. CONFIG_ARM64_SVE is now disabled for ARMv9-A when explicitly set to n, and ARM64 stack sizes for userspace with FPU and MAX_XLAT_TABLES for userspace tests were increased to accommodate.

The ARM64 MMU gained arch_mem_domain_deinit() to release page tables back to the pool when a memory domain is de-initialized, using the existing discard_table() mechanism to recursively free sub-tables.

FVP board support was restructured into a unified fvp_base_revc_2xaem board with a common SoC series, adding ARMv9-A variants: v9a, v9a/smp, and v9a/smp/ns (with TFA). Cortex-A320 was added as a board variant. A PM CPU ops driver for Arm FVP enables bare metal SMP without ATF by configuring RVBAR_EL3 to redirect secondary CPU reset vectors to Zephyr’s image header.

Kernel: Heap Hardening and SMP Timer Fixes

CONFIG_SYS_HEAP_CANARIES was introduced to place canary values at the end of each allocation, validated on free. The canary is computed from chunk address and size XORed with a magic value and stored as a trailer to avoid complicating aligned allocation. This was then superseded by the SYS_HEAP_HARDENING tiered Kconfig with five levels: NONE, BASIC (double-free and overflow detection), MODERATE (free list and neighbor consistency), FULL (trailer canary on every allocation), and EXTREME (exhaustive heap validation on every operation). Hardening checks use LOG_ERR + k_panic() rather than __ASSERT, so the configured level is honored regardless of assertion settings.

Z_HEAP_MIN_SIZE was previously defined as hardcoded magic numbers gated by a growing tower of #ifdefs. Nicolas replaced this with build-time computation from the actual C structures using an iterative fixed-point expansion. The underlying infrastructure is a new zephyr_constants_library() CMake function that encapsulates the offsets-style pattern: creating an OBJECT library from GEN_ABSOLUTE_SYM() declarations and generating a header from the resulting symbols.

sys_clock_lock() and sys_clock_announce_locked() were introduced in kernel/timeout to provide a unified timer lock API. The arm_arch_timer, apic_tsc, hpet, xtensa_sys_timer, riscv_machine_timer, and intel_adsp_timer drivers were all migrated to this API, eliminating a race on SMP where sys_clock_elapsed() could observe an updated last_cycle before sys_clock_announce() had advanced curr_tick.

LoRa and LoRaWAN

Carlo Caione restructured the LoRaWAN subsystem and extended the LoRa driver layer.

The LoRaWAN subsystem was refactored to support multiple backends. The loramac-node backend was moved to a subdirectory, directories were renamed to hyphenated form (loramac-node, lora-basics-modem), and region Kconfig symbols were made backend-agnostic.

A native SX126x driver for Semtech SX1261/SX1262 was added that does not depend on loramac-node or lora-basics-modem, enabled by CONFIG_LORA_MODULE_BACKEND_NONE (experimental). The driver was extended with STM32WL sub-GHz radio support for the STM32WL’s internally-integrated SX126x-compatible radio core. Sleep mode power management was added with a PM_DEVICE callback that disconnects RF GPIO pins on suspend and reconfigures them on resume.

Two new API functions were added to the LoRa API: lora_cad() and lora_cad_async() for Channel Activity Detection (with symbol_num, det_peak, and det_min parameters embedded in struct lora_modem_config), and lora_recv_duty_cycle() for hardware-driven RX duty cycling where the radio autonomously alternates between sleep and listening for a preamble without MCU involvement.

The lora-basics-modem module received an initial smtc_modem_hal HAL implementation covering the LoRa Basics Modem HAL layer (Radio Driver HAL and RAL BSP were already handled by the lbm_sx126x drivers). The LBM porting test suite was integrated as a Zephyr test. Remaining HAL stub functions were also added.

Carlo also added a DeviceMmioCheck CI compliance check to check_compliance.py that flags driver files casting DT_REG_ADDR() or DT_INST_REG_ADDR() directly to a pointer without using the device MMIO API — an access pattern that faults on MMU-enabled systems.

Drivers: Microcrystal RV3032

Stoyan Bogdanov added multi-function support for the Microcrystal RV-3032-C7 RTC by introducing an MFD driver to centralize I2C access and interrupt arbitration. The existing RTC driver was reworked to use the MFD parent, allowing parts of the chip that did not fit the RTC API to be exposed through separate drivers.

Three child drivers were added: a counter driver exposing the RV3032’s hardware timer via the counter API, a temperature sensor driver reporting from the chip’s internal sensor with high/low threshold interrupt support, and updated Devicetree bindings. Tests for all three subsystems were added to the build-all test suites.

Boards: phyBOARD-Polis A53 and SMP

Vitor Sato Eschholz ported Zephyr to the quad Cortex-A53 cluster of the phyBOARD-Polis (phyCORE-i.MX 8M Mini/Nano), which previously only ran on the Cortex-M4 core. The port includes SMP support. A UART3 node was added to the imx8mm Devicetree, and board documentation was updated with an A53 core description and a corrected board overview image.

TI CC13xx/CC26xx, PTP, and Documentation

Alexandre Bailon fixed two bugs in the IEEE 802.15.4 cc13xx/cc26xx driver. The channel selection path was stopping and restarting all radio operations even when the channel had not changed; skipping the restart when the channel is unchanged fixed the OpenThread joiner. The frame filter update path was computing new filters but not submitting them to the radio core; the fix restarts RX with the new filters immediately.

Pascal Bodin fixed cc13xx_cc26xx_irq_tx_ready() to check that the TX Ready interrupt occurred rather than checking for free space in the TX FIFO. The original check allowed a race in the OpenThread Spinel protocol implementation when a UART RX interrupt arrived between otPlatUartSend() setting ot_uart.tx_busy and initializing write_length.

Adam Wojasinski fixed an undefined behavior vulnerability in Zephyr’s PTP (Precision Time Protocol) subsystem. The bug was in how the PTP stack computed timeouts — it used interval values sourced directly from incoming PTP management messages as bit-shift counts, without any bounds validation. Shifting by a negative or out-of-range count is undefined behavior in C, and since those interval values could be freely set by a remote peer, a malicious or malformed message could trigger this in a running embedded system — with unpredictable consequences ranging from wrong timing to crashes. The fix clamps both both interval values to [-63, 63] before they touch any shift operation.

Adrien Ricciardi added a documentation link from K_xxx_THREAD_DEFINE to the thread entry point function type.

Summary

Type Count
Authored 256

BayLibre contributions to U-Boot v2026.04

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U-Boot v2026.04 was released on April 6, 2026.

MediaTek Clock Driver

David Lechner overhauled the MediaTek clock driver infrastructure in this release.

The first area of work was safety. David added size fields to the core clock data structures. These enable bounds checking on array accesses that currently occur without any range validation. He also added driver-specific of_xlate ops that return -EINVAL when zero args are passed and -ENOENT when the requested ID is out of range, catching out-of-bounds accesses before they reach the clock data arrays. The ops also perform the id_offs_map translation once at of_xlate time and store the mapped ID in clk->id, removing the need to call mtk_clk_get_id() repeatedly later.

Structural cleanup addressed several confusing patterns. The struct mtk_clk_tree.gates_offs field was used in two different contexts depending on whether it referred to the tree’s own gates or a struct mtk_cg_priv‘s gates. David added a dedicated gates_offs field to struct mtk_cg_priv to eliminate the ambiguity. The CLOCK_PARENT_* macro aliases of CLOCK_* were removed, and infrasys functions were reorganized into a coherent group.

On MT8365 specifically, David fixed missing and out-of-order clock entries. Since clocks are looked up by index, any gap or transposition causes the wrong clock to be used. Missing topckgen IDs and incorrect clock parents were also corrected.

The MT8365 topckgen-cg driver was removed. It had been rejected upstream in Linux because it created a separate clock controller in the same address space as the existing topckgen controller. David added gate support directly to topckgen drivers, split struct mtk_clk_tree for MT8365 into three separate structures for apmixedsys, topckgen, and infracfg, and removed the now-unnecessary topckgen-cg driver and its associated Devicetree node. He also implemented dump callbacks for MediaTek clocks to allow inspection of the full clock tree, which is useful for debugging given the hundreds of clocks present on these SoCs.

MediaTek Pinctrl

Vitor Sato Eschholz added the pinctrl driver for the MT8365 SoC and added pinmux_property_set ops support to the MediaTek pinctrl framework.

David Lechner extended the common MediaTek pinctrl driver with support for the mediatek,pctl-regmap Devicetree property. In upstream Linux devicetrees, some pinctrl nodes sit in the interrupt controller address space rather than the pinctrl register space, and a mediatek,pctl-regmap phandle points to the actual pinctrl registers through a syscon node.

Two bugs in the pinctrl driver were fixed. The PUPD/R1/R0 registers cover only a small subset of pins, so mtk_pinconf_bias_set_pupd_r1_r0() normally returns an error for most pins. The error was being propagated up, causing the configuration loop to exit early and leaving some pins in a group unconfigured. David also added PUPD register definitions for MT8365 and fixed the array size for reg_cals.

MediaTek Platform Support

Julien Masson added support for the MediaTek MT8188 SoC. He added basic SoC support including watchdog and tphy support via upstream compatible strings, and a clock driver based on the Linux clk-mt8188-* drivers. He then added MT8390 EVK board support with boot, UART, watchdog, and MMC enabled. MT8390 is based on MT8188.

David Lechner switched the MT8365 EVK to CONFIG_OF_UPSTREAM=y and removed the U-Boot copy of the MT8365 Devicetree source files. In the mtk-sd MMC driver, he replaced separate mask and shift macro definitions with GENMASK and FIELD_GET/FIELD_PREP macros.

Driver Model

Markus Schneider-Pargmann extended the driver model core to allow multiple drivers to match the same compatible string. Previously, when the first matching driver returned -ENODEV, the next compatible string in the device’s list was tried instead of continuing to the next driver with the same compatible. This change moves the iteration so that -ENODEV advances to the next driver rather than the next compatible. A test was added to verify the behavior.

This is required for ti-musb-host and ti-musb-peripheral, which both match the same compatible but differ based on the dr_mode DT property. Each driver checks dr_mode in its bind function and returns -ENODEV if it does not match, allowing the other driver to bind instead.

TI AM335x Video and Display

Markus Schneider-Pargmann added OF graph support to the TI AM335x LCDC driver, enabling panel configuration through the standard OF graph binding rather than requiring board-specific code.

He added a get_modes() operation to the panel uclass. Linux’s simple_panel driver exposes panel timings through get_modes() returning a list of drm_display_mode structs. Markus added a compatible path in U-Boot where get_display_timing() calls either get_display_timing() or get_modes() depending on which panel operation is available. He then added the tfc_s9700rtwv43tr_01b panel with hardcoded timing data using this new infrastructure, and added a simple_panel_drv_data struct to hold a display_timing pointer for panels that are ported from Linux’s simple_panel driver.

For clock support, Markus split the common omap2plus clock functions into a new Kconfig symbol so drivers that need them can select it explicitly, and added a separate CLK_TI_OMAP4_CM Kconfig symbol for the omap4-cm driver. He added a ti-omap-prm power domain stub driver to allow upstream DT to use simple-pm-bus on am33xx, where all power domains are enabled at boot but a probe-capable driver is required. He also made clocks optional in simple-pm-bus to match the binding, which only requires either power domains or clocks, not both.

Android Boot

Guillaume La Roque added bootconfig support for Android vendor boot image version 4, where bootconfig is mandatory. In android_image_get_ramdisk(), after copying both vendor and boot ramdisks, androidboot.* entries are extracted from the kernel command line and written to the bootconfig section. The ramdisk and bootconfig sizes are then updated and the androidboot.* entries are stripped from the kernel command line.

He also added an abootimg get ramdisk command for retrieving ramdisk address and size from Android boot images version 3 and later, which combine vendor ramdisk, boot ramdisk, and bootconfig sections into a single ramdisk. A sandbox memory mapping fix was also included, converting header pointers to physical addresses with map_to_sysmem() in parse_hdr functions and adding map_sysmem()/unmap_sysmem() calls in android_image_get_data().

Video Display and Regulator

Julien Stephan added a read_edid command that retrieves EDID data from a connected display using the read_edid callback from the DISPLAY driver uclass, rather than going through raw I2C as i2c edid does. He also refactored display_read_timing() to reuse display_read_edid(), which had been made unreachable since commit 2dcf143398ad when the display uclass was reorganized.

In the common regulator driver, Julien fixed a compilation failure when CONFIG_DM_GPIO is not enabled. The enable GPIO is optional, so GPIO calls are now conditionally skipped. He also replaced a manual GPIO validity check with dm_gpio_is_valid() and removed an unnecessary debug trace.

Build and Test Infrastructure

David Lechner fixed out-of-tree builds where scripts/Makefile.autoconf was using the relative $(srctree) path (..) when creating a symlink for include/asm/arch, resulting in a broken symlink when the build tree is not adjacent to the source tree. The fix uses $(abs_srctree) instead.

He added a requirements.txt for pylibfdt specifying setuptools>=78.1.1, following the per-tool requirements pattern. He also fixed test.py to check whether the ubconfig file exists before trying to use it, and corrected a spelling error in the source_dir docstring.

Julien Stephan removed the now-unused ufs_post_bind() declaration from include/ufs.h and cleaned up the corresponding includes from drivers that included <ufs.h> solely for that prototype.

Summary

Type Count
Authored 72
Signed-off-by 12
Reviewed-by 2
Tested-by 1