Context & Challenges
Arm, expanding its Cortex-A portfolio to meet the growing demand for real-time Edge AI, selected Zephyr RTOS as a strategic operating system to unlock new system design options for device makers. The focus of the initiative was the Arm Cortex-A320, the smallest Armv9 implementation, designed to support both real-time and rich operating systems, alongside the Cortex-A510.
At project start, Zephyr had no explicit Armv9-A enablement, and several technical challenges needed to be addressed to bring the latest generation of Arm processors into the RTOS:
- No foundational Armv9.2-A architecture support in the Zephyr arm64 architecture
- Absence of context management for the Scalable Vector Extension (SVE / SVE2) required to leverage advanced SIMD capabilities
- Fragmented Fixed Virtual Platform (FVP) board infrastructure needing unification across Armv8-A and Armv9-A
- SMP correctness and robustness issues in arm64-specific code and shared kernel components
- Need for comprehensive validation spanning privilege levels, SIMD stress testing, and architecture feature detection
- Requirement to deliver all work upstream to Zephyr mainline, preserving an upstream-first, maintainable model
Arm partnered with BayLibre — a trusted, long-standing key Zephyr contributor — to deliver this enablement upstream with proven expertise and open-source rigor.
Achievements
BayLibre successfully delivered foundational Armv9-A enablement in Zephyr RTOS, unlocking Cortex-A320 and SVE support for efficient, real-time Edge AI deployments.
Key achievements included:
- Explicit Armv9-A architecture support added to the Zephyr arm64 architecture, with validated configurations for the Cortex-A510 and Cortex-A320 processors
- SVE / SVE2 context management with an intelligent lazy context preservation mechanism, enabling applications to use advanced SIMD capabilities efficiently while reducing context switching overhead
- Unified Fixed Virtual Platform (FVP) board infrastructure supporting both Armv8-A and Armv9-A configurations, including single-core systems, SMP configurations, and Trusted Firmware-A (TF-A)–based setups
- SMP stability improvements resolving multiple issues across arm64-specific code and shared kernel components, improving multi-core correctness and robustness across platforms
- Comprehensive validation suite including SVE context switching tests across privilege levels, SIMD stress testing, and comprehensive architecture feature detection
- Full validation using the Arm Architecture Envelope Models (AEM) FVP, reflecting real-world deployment scenarios
- All features merged into Zephyr mainline (Zephyr Pull Request #96852), immediately available to the wider open-source community
This milestone marks the beginning of broader Armv9-specific enablement already under development through the ongoing Arm–BayLibre partnership.
Open-Source Story
The project followed a strict upstream-first methodology, fully aligned with BayLibre’s open-source DNA and its long-standing role as a key Zephyr Project contributor.
BayLibre worked closely with Arm’s architecture and software teams to:
- Structure Armv9-A support according to Zephyr subsystem expectations and arm64 architecture conventions
- Rework and unify the FVP board infrastructure in a way that benefits the entire Zephyr community
- Submit incremental, review-friendly patches to the Zephyr Project
- Collaborate directly with Zephyr maintainers during the review process
- Land all enablement upstream in Zephyr mainline via Pull Request #96852
As a result, Arm and the Zephyr ecosystem gained:
- Immediate, community-wide availability of Armv9-A and Cortex-A320 support
- A robust, unified FVP infrastructure covering Armv8-A and Armv9-A
- Improved SMP correctness benefiting all arm64 Zephyr users
- A credible RTOS alternative for Edge AI on modern Arm processors
- A sustainable foundation for future Armv9-specific enablement
BayLibre acted as a technical interface between Arm’s architectural expertise and the Zephyr Project’s open-source governance.