BayLibre contributions to U-Boot v2026.07

U-Boot v2026.07 was released on July 6, 2026. BayLibre was the top contributing company and David Lechner the top contributor.

The release centered on MediaTek: a clock-framework rework across every in-tree MediaTek SoC, MT8189 and MT8195 SoC bring-up, a new PMIC wrapper stack, and upstream TI devicetree work on the CPSW and musb drivers.

MediaTek

The MediaTek work this release spans three layers: the shared clock framework change touches every MediaTek board already in U-Boot, the two new SoCs (MT8189 and MT8195) are the first bootable EVKs for their families, and the PMIC wrapper is new infrastructure downstream boards will build on.

Clock Driver

The MediaTek clock framework was overhauled this release, touching every in-tree MediaTek SoC and restructuring how external clock parents are described.

David Lechner replaced the ad-hoc xtal2_rate integer with struct mtk_parent, a structured description carrying a clock’s parent ID, flags, and rate. On top of it he added CLK_PARENT_EXT (b6d11f69ac1f) to distinguish external clock parents from internal mux parents, then removed the now-redundant CLK_PARENT_XTAL, CLK_PARENT_MIXED, and CLK_BYPASS_XTAL flags. David converted the CLK_XTAL references scattered through every SoC clock table to the correct pad-clock names — CLK_PAD_CLK26M on MT8188, MT8195, MT8365, the MT85xx parts and MT7623, CLK_PAD_CLK40M on the MT798x family, and CLK_PAD_CLK25M on MT7622.

Internal helpers round out the change: MUX_GATE_MIXED and MUX_MIXED_CLR_SET_UPD_FLAGS() macros for mixed-parent muxes, shared parent macros, consolidated *_mux_get_rate() paths, and mtk_clk_id_is_* plus a reworked parent-rate lookup that let the core resolve a clock’s lineage without per-driver callbacks.

Julien Stephan’s contributions target MT8188. He implemented the GATE_FLAGS macro (5f2111e9ff79) to match the existing FIXED_CLK and MUX patterns, then fixed a circular clock dependency where CLK_TOP_APLL1_D4 and CLK_TOP_APLL1 declared each other as parents (6354f83f43f7) — the corrected parent is CLK_APMIXED_APLLX. He also added a missing fixed clock, fixed several clock parents, and folded the separate MT8188 topckgen-cg driver into the main topckgen driver.

The framework also gained MT8189 VLP and UFS clocks, a corrected MT8188 CLK_TOP_CLK{13,26}M rate, an MT7623 pericfg priv_auto size fix, and a dropped MT8365 topckgen map. As MediaTek custodian, David committed the new MT8189 clock driver and its dt-bindings from external contributors.

MT8189 and MT8195 SoC Support

This release brings two new MediaTek SoC families to bootable EVK state, with MT8189 spanning clock, pinctrl, USB, MMC, UFS, and devicetree work across this post.

Julien Stephan added MT8195 SoC support in the ARM init code with an upstream-compatible watchdog string (2517e2b524e8) and fixed the MT8195 mem_map initialization that broke early-boot memory mapping (40a4889220ac).

Board support followed for the MT8395 EVK (b2a1db57ebed) and the MT8370 EVK (b5db4f322a0c), bringing U-Boot up on both development kits. His MT8195 work continues in the UFS and PMIC sections below.

For MT8189, David Lechner added SIP-based platform bininfo lookups (cde43f9bbd5d) so print_cpuinfo() reports the actual SoC segment and part via MediaTek’s SIP firmware instead of generic branding, and enabled GPIO support in the MT8189 defconfig. As MediaTek custodian he committed the MT8189 SoC family support, the MT8189 dtsi, and the pinmux macro header from external contributors.

Memory Map and DRAM Initialization

Memory initialization was simplified across the entire MediaTek ARMv8 family, removing a per-SoC callback that duplicated what the common path already does. The MT8195 mem_map fix above is part of this broader sweep.

David Lechner consolidated all MediaTek ARMv8 mem_map definitions into a single file driven by Kconfig options for DDR size and MMIO base (24ffbb2aa17e), adding CONFIG_MTK_MEM_MAP_DDR_BASE_PHY so the physical DDR base can be configured per target. Per-board hand-edited mapping tables are no longer needed.

The same sweep removed dram_init_banksize() from MT8518, MT8516, MT8512, MT8365, MT8195, MT8188, MT8183, MT7988, and MT7987, along with fdtdec_setup_memory_banksize() calls on MT8518, MT8195, MT8188, and MT8183, and init functions now check the return values of fdtdec_setup_mem_size_base() where they had previously been ignored.

Two correctness bugs were fixed in the process. On MT8195 and MT8188, gd->ram_top was derived from gd->mon_len — the size of the U-Boot code, not usable RAM — so the limit landed above the actual RAM top and broke MMC DMA on MT8195 (af4cba9a05aa); the fix overrides the get_effective_memsize() weak function instead. Removing dram_init_banksize() inadvertently introduced a bug on MT8512, MT8195, MT8189, MT8188, MT7988, and MT7987 where gd->bd->bi_dram[0].size carried the wrong value, which was reported and fixed during the release cycle.

Pinctrl

Before peripherals can talk to the outside world the pins need configuring, and the MediaTek pinctrl framework gained a new SoC plus several correctness fixes this release.

David Lechner added MT8189 pinctrl support, wiring up get_pinconf functions and adding handling for the RSEL register used for bias configuration (937884083ea8). He also fixed a pinconf bias bug on MT8189 and now prints bias info alongside pinmux for debugging. He raised the maximum number of pinctrl base addresses and added a bounds check (64d48d21b51c) so a SoC exposing more register banks than the driver expected no longer walks off the array. Julien Stephan added the missing bind callback across several MediaTek pinctrl drivers — its absence had prevented proper device-model binding.

UFS

UFS support was extended to two more MediaTek SoCs and hardened in the process.

Julien Stephan added MT8195 to the ufs-mediatek driver with a new compatible, implemented clock handling including power-on/power-off sequencing, and fixed PHY handling for the MT8195 path (ac6e41ee6e65) — the same MT8195 family brought up in the platform section. The companion phy-mtk-ufs driver was cleaned up to use clk_bulk functions, disable clocks in power_off, and drop manual priv_auto allocation; ufs_hba_ops callbacks now propagate return values so a failed callback no longer falls through silently, and a phy_initialization helper standardizes that callback’s invocation.

MT8189 gained UFS support: David Lechner added the mediatek,mt8183-ufshci compatible (6dbb7af1f423), wired UFS device tree nodes into MT8189, and added UFS defconfigs for the Genio 520 and Genio 720 EVKs with a UFS variant of the Genio 520/720 EVK device tree and the matching mt8395_genio_1200_evk_ufs defconfig.

PMIC and Regulators

A new MediaTek PMIC Wrapper (mtk-pwrap) driver arrived this release — Julien Masson wrote the IP block that mediates SPI between the CPU and the PMIC on MT8365-class SoCs (219c05f3f68e), and added a regulator driver for the MT6357 PMIC (4267b414dca1). Both are new drivers, adding the mtk-pwrap and mt6357 compatibles.

David Lechner then reworked the wrapper Julien Masson introduced. PMIC child info is now selected from the PMIC compatible rather than a fixed wrapper configuration. He removed interrupt-related code that U-Boot cannot use and added PWRAP_CAP_WDT_SRC and an init capability flag. He also gave the MT6359 regulators unique names in the Genio device trees and enabled PMIC and regulators in the MT8365 EVK defconfig.

MT8195 support followed: Julien Stephan extended mtk-pwrap to MT8195 with SoC-specific initialization (a97c82bfdf52). The three contributors’ work on the same driver reads as one coherent bring-up: Julien Masson’s foundation, David’s generalization, and Julien Stephan’s MT8195 port.

USB, PHY, and MMC

USB and MMC support reached MT8189 and the Genio 520/720 boards.

David Lechner wrote a new XS-PHY driver for the USB PHY found on newer MediaTek SoCs (82fadfe53f42), reusing upstream devicetree bindings, and added USB/PHY nodes for the Genio 520 and Genio 720 EVKs with USB enabled in the MT8189 defconfig. On the MMC side, he added the mediatek,mt8189-mmc compatible (b3d16267b509) and enabled DMA and async_fifo_crcsts for that controller — without async_fifo_crcsts, MMC writes fail in HS200 mode. He selected LMB_LIMIT_DMA_BELOW_RAM_TOP for both mtk-sd and mtk_eth because the MediaTek SD controller can only reach the first 4 GB of RAM over DMA, so DMA allocations must stay below gd->ram_top.

Devicetree, Config, and Maintenance

Board and configuration housekeeping accompanied the SoC work, plus a maintainer change.

David Lechner and Julien Stephan were named MediaTek custodians, recorded in MAINTAINERS with the MediaTek custodian git repository (f82f50caa1d5). The EVK defconfigs were renamed to board-agnostic names — mt8390_genio_700_evk, mt8370_genio_510_evk, mt8395_genio_1200_evk — and Julien Stephan deduplicated the MT8370 and MT8390 configs through a shared mt8188.config, removed a useless CONFIG_SYS_BOARD, and added himself as maintainer of those configs.

Devicetree additions covered the Genio 520/720: SNOR config and DT support went in (f1b077c512b5) alongside U-Boot SD-card overrides and MT8371 SD-card nodes, and the MT7622 device trees were cleaned up to use generic node names with an SPI bus bridge warning fixed. Several smaller maintenance items followed: EVK MAINTAINERS entries were consolidated, mtk_pll_early_init() was made static, an unused MT8183 function and an empty board_init() on the MT8390 EVK were removed, and CONFIG_IDENT_STRING was dropped from the MT8365, MT8370, MT8390, and MT8395 EVK defconfigs. The Genio 520/720 EVK defconfigs and DTS from external contributors landed through David as custodian.

TI Networking and USB

Outside the MediaTek tree, the TI CPSW ethernet and musb USB drivers were updated to work with upstream devicetrees.

Markus Schneider-Pargmann added support for the cpsw-switch devicetree binding to the CPSW driver (5bb7ae8921ee), so a single runtime path selects between cpsw_eth_of_to_plat_switch() and cpsw_eth_of_to_plat_legacy() based on the compatible — upstream and downstream devicetrees now parse from the same code. He replaced the per-compatible matching in cpsw_phy_sel() with driver data, removed a now-redundant compat-string argument that was already stored in the priv struct, and corrected an error message that referenced the wrong field.

For the musb USB driver, he added ti,musb-am33xx compatibles to both ti-musb-host and ti-musb-peripheral (4cf2275ee741), each checking dr_mode and returning -ENODEV when the mode does not match — this works around the absence of ti,am33xx-usb in the upstream am33xx.dtsi. The ctrl_mod register parsing was updated to handle the relative offsets used in the upstream devicetree (9bf19639a76a) rather than absolute addresses.

SCSI and lwIP Networking

Back in the core U-Boot tree, the SCSI environment loader and the lwIP wget path both received correctness fixes.

David Lechner added CONFIG_ENV_SCSI_HW_PARTITION (83223d4f8698) so the environment can be loaded directly from a SCSI disk with no partition table, and documented the ENV_IS_IN_SCSI requirements. scsi_scan() was moved out of scsi_get_blk_by_uuid(), which now returns -ENODEV instead of failing silently, the public SCSI function return values were documented, and the obsolete scsi reset command was dropped.

In the lwIP stack, wget_do_request() was changed to return errno codes instead of command return codes (91911aa0c76e), with the error path fixed to match, and net_lwip_eth_stop() was introduced to cleanly stop the ethernet interface before reload.

Build and Miscellaneous

The build and flash-part fixes round out the release — a corrected Kconfig option, a new SPI NOR part, and test cleanup.

David Lechner corrected the SUPPORTS_FW_LOADER Kconfig option, removed a duplicate dtbs recipe from the Makefile, and repaired a missing quote in a regulator error message. The SPI NOR ID table now carries flags for the mx25u12835f part (bc6c4ee8d430), and the test/py GPIO scripts dropped trailing semicolons and unused imports and made gpio_op_pin optional. Julien Stephan fixed a misleading comment in the FIT image handling code.

Summary

Type	Count
Authored	179
Co-developed-by	2
Signed-off-by	5
Reviewed-by	101
Tested-by	21